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rej03d0835-0300 rev.3.00 jun 06, 2008 page 1 of 40 m51995ap/afp switching regulator control rej03d0835-0300 rev.3.00 jun 06, 2008 description m51995a is the primary switching regulator controller which is especially designed to get the regulated dc voltage from ac power supply. this ic can directly drive the mos-fet with fast rise and fast fall output pulse. type m51995a has the functions of not only high frequency osc and fast output drive but also current limit with fast response and high sensibility so the true ?f ast switching regulator? can be realized. it has another big feature of current protection to short a nd over current, owing to the integrated timer-type protection circuit, if few parts are added to the primary side. the m51995a is equivalent to the m51977 with externally re-settable ovp (over voltage protection) circuit. features ? 500 khz operation to mos fet ? output current : 2 a ? output rise time 60 ns, fall time 40 ns ? modified totempole output method with small through current ? compact and light-weight power supply ? small start-up current : 90 a typ. ? big difference between ?start-up voltage? and ?stop voltage? makes the smoothing capacitor of the power input section small. start-up threshold 16 v, stop voltage 10 v ? packages with high power dissipation are used to with-sta nd the heat generated by the gate-drive current of mos fet. 16-pin dip, 20-pin sop 1.5 w (at 25 c) ? simplified peripheral circuit with protection circuit and built-in large-capacity totempole output ? high-speed current limiting circuit using pulse-by-pulse method (two system of clm + pin, clm ? pin) ? protection by intermittent operation of output over current : timer protection circuit ? over-voltage protection circuit with an externally re-settable latch (ovp) ? protection circuit for output miss action at low supply voltage (uvlo) ? high-performance and highly functional power supply ? triangular wave oscillator for easy dead time setting application feed forward regulator, fly-back regulator
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 2 of 40 recommended operating conditions ? supply voltage range: 12 to 36 v ? operating frequency: less than 500 khz ? oscillator frequency setting resistance ? t-on pin resistance r on : 10 k to 75 k ? ? t-off pin resistance r off : 2 k to 30 k ? block diagram under voltage lockout voltage regulator 7.1 v 5.8 v 15.2 k 3 k 500 f/b det gnd v cc latch on/off ovp (shut down) oscillator capacitance cf oscillator resistance t-on (on duty) oscillator resistance t-off (off duty) vf clm+ +current limit clm ? ? current limit ct intermittent operation determine capacitance collecto r v out emitter 6 s 1 s 1 s 1 s pwm comparator pwm latch + ? op amp 2.5 v intermittent action intermittent action and osc control ? current limit latch +current limit latch oscillator (triangle)
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 3 of 40 pin arrangement 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 20 19 18 17 16 15 14 13 9 10 12 11 collector m51995ap (top view) outline: prdp0016aa-a (16p4) m51995afp (top view) outline: prsp0020da-a (20p2n-a) v out emitter vf on/off ovp det f/b collector v out emitter vf on/off heat sink pin ovp det f/b v cc clm+ clm ? gnd ct t-off cf t-on v cc clm+ clm ? gnd ct t-off cf t-on heat sink pin note: connect the heat sink pin to gnd.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 4 of 40 absolute maximum ratings item symbol ratings unit conditions supply voltage v cc 36 v collector voltage v c 36 v 2 peak output current i o 0.15 a continuous v f terminal voltage v vf v cc v on/off terminal voltage v on/off v cc v clm ? terminal voltage v clm ? ? 4.0 to + 4.0 v clm + terminal voltage v clm + ? 0.3 to + 4.0 v ovp terminal current i ovp 8 ma det terminal voltage v det 6 v det terminal input current i det 5 ma f/b terminal voltage v fb 0 to 10 v t-on terminal input current i ton ? 1 ma t-off terminal input current i toff ? 2 ma power dissipation pd 1.5 w ta = 25 c thermal derating factor k 12 mw/ c ta > 25 c operating temperature topr ? 30 to + 85 c storage temperature tstg ? 40 to + 125 c junction temperature tj 150 c notes: 1. ? + ? sign shows the direction of current flow into the ic and ? ? ? sign shows the current flow from the ic. 2. this terminal has the constant vo ltage characteristic of 6 to 8 v, when current is supplied from outside. the maximum allowable voltage is 6 v when the constant voltage is applied to this terminal. and maximum allowable current into this terminal is 5 ma. 3. the low impedance voltage supply shoul d not be applied to the ovp terminal.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 5 of 40 electrical characteristics (v cc = 18 v, ta = 25 c, unless otherwise noted) limits block item symbol min. typ. max. unit test conditions operating supply voltage range v cc v cc(stop) ? 35 v operation start-up voltage v cc(start) 15.2 16.2 17.2 v operation stop voltage v cc(stop) 9.0 9.9 10.9 v difference voltage between operation start and stop ? v cc 5.0 6.3 7.6 v ? v cc = v cc(start) ? v cc(stop) 50 90 140 a v cc = 14.5v, ta = 25 c stand-by current i ccl 40 90 190 a v cc = 14.5v, ? 30 ta 85 c operating circuit current i cco 10 15 21 ma v cc = 30v 0.95 1.31 5.0 ma v cc = 25v circuit current in off state i cc off 50 90 140 a v cc = 14v 0.95 1.35 2.0 ma v cc = 25v circuit current in timer off state i cc ct ? 160 240 a v cc = 14v 1.3 2.0 3.0 ma v cc = 25v supply voltage circuit current circuit current in ovp state i cc ovp 125 200 310 a v cc = 9.5v on/off terminal high threshold voltage v thh on/off 2.1 2.6 3.1 v on/off terminal low threshold voltage v thl on/off 1.9 2.4 2.9 v on/off on/off terminal hysteresis voltage ? v thon/off 0.1 0.2 3.0 v current at 0% duty i fbmind ? 2.1 ? 1.54 ? 1.0 ma f/b terminal input current current at maximum duty i fbmaxd ? 0.90 ? 0.55 ? 0.40 ma f/b terminal input current current difference between max and 0% duty ? i fb ? 1.35 ? 0.99 ? 0.70 ma ? i fb = i fbmind ? i fbmaxd terminal voltage v fb 4.9 5.9 7.1 v f/b terminal input current = 0.95ma f/b terminal resistance r fb 420 600 780 ? detection voltage v det 2.4 2.5 2.6 v input current of detection amp i indet ? 1.0 3.0 a v det = 2.5v detection voltage gain of detection amp g avdet 30 40 ? db ovp terminal h threshold voltage v thovph 540 750 960 mv ovp terminal hysteresis voltage ? v thovp ? 30 ? mv ? v thovp = v thovph ? v thovpl ovp terminal threshold current i thovp 80 150 250 a ovp terminal input current i inovp 80 150 250 a v ovp = 400mv ovp reset supply voltage v ccovpc 7.5 9.0 10.0 v difference supply voltage between operation stop and ovp reset v cc(stop) ? v ccovpc 0.55 1.20 ? v ovp terminal is open. (high impedance) ? 480 ?320 ?213 v cc = 30v ovp current from ovp terminal for ovp reset i thovpc ? 210 ? 140 ? 93 a v cc = 18v
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 6 of 40 (v cc = 18 v, ta = 25 c, unless otherwise noted) limits block item symbol min. typ. max. unit test conditions timer frequency f timer 0.27 0.40 0.60 hz c t = 4.7 f ? 193 ? 138 ? 102 v ct = 3.3v, ta = ? 5 c ? 178 ? 127 ? 94 ta = 25 c timer charge current i timech ? 147 ? 105 ? 78 a ta = 85c timer off time/on time ratio time off/on 7.0 8.7 11.0 ? clm ? terminal threshold voltage v thclm ? ? 220 ? 200 ? 180 mv ? 5 ta 85c clm ? terminal current i inclm ? ? 170 ? 125 ? 90 a v clm? = ? 0.1v clm ? delay time from clm ? to v out t pdclm ? ? 120 ? ns clm + terminal threshold voltage v thclm + 180 200 220 mv ? 5 ta 85c clm + terminal current i inclm + ? 270 ? 205 ? 140 a v clm + = 0v clm + delay time from clm + to v out t pdclm + ? 90 ? ns oscillating frequency fosc 170 188 207 khz maximum on duty t duty 47.0 50.0 53.0 % r on = 20k ? , r off = 17k ? c f = 220pf, ? 5 ta 85c upper limit voltage of oscillation waveform v osch 3.97 4.37 4.77 v f osc = 188khz lower limit voltage of oscillation waveform v oscl 1.76 1.96 2.16 v f osc = 188khz oscillator voltage difference between upper limit and lower limit of osc waveform ? v osc 2.11 2.41 2.71 v f osc = 188khz v f = 5v 170 188 207 osc frequency in clm operating state v f = 2v f oscvf 108 124 143 khz r on = 20k ? , r off = 17k ? c f = 220pf duty in clm operating state v f = 0.2v t vfduty 11.0 13.7 22.0 ? min off duty/max on duty v f voltage at timer operating start v thtime 2.7 3.0 3.3 v v f v f terminal input current i vf ? 2 6 a source current v ol 1 ? 0.05 0.4 v v cc = 18v, i o = 10ma v ol 2 ? 0.7 1.4 v v cc = 18v, i o = 100ma v ol 3 ? 0.69 1.0 v v cc = 5v, i o = 1ma output low voltage v ol 4 ? 1.3 2.0 v v cc = 5v, i o = 100ma v oh 1 16.0 16.5 ? v v cc = 18v, i o = ? 10ma output high voltage v oh 2 15.5 16.0 ? v v cc = 18v, i o = ? 100ma output voltage rise time t rise ? 50 ? ns no load output output voltage fall time t fall ? 35 ? ns no load
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 7 of 40 main characteristics power dissipation pd (mw) circuit current i cc (ma) circuit current i cc (ma) thermal derating (maximum rating) ambient temperature ta ( c) circuit current vs. supply voltage (normal operation) supply voltage v cc (v) supply voltage v cc (v) supply voltage v cc (v) supply voltage v cc (v) circuit current vs. supply voltage (off state) circuit current vs. supply voltage (ovp operation) circuit current vs. supply voltage (timer off state) ovp terminal threshold voltage vs. ambient temperature ambient temperature ta ( c) circuit current i cc (ma) circuit current i cc (ma) ovp terminal threshold voltage v thovp (v) 1800 1500 1200 900 600 300 0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 3.2 2.4 1.2 2.8 2.0 1.6 0.4 0.8 0 22 m 18 m 16 m 14 m 12 m 10 m 100 50 0 3.2 2.4 0.8 2.8 1.6 2.0 1.2 0.4 0 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0 0 25 50 75 100 125 150 85 010203040 010203040 10 20 30 40 010203040 ? 40 ? 20 0 20 40 60 80 100 ovp reset point 8.87 v ( ? 30 c) 8.94 v (25 c) 9.23 v (85 c) ta = 25 c ta = 85 c ta = ? 30 c ta = 25 c ta = 85 c ta = ? 30 c ta = 25 c ta = 85 c ta = ? 30 c ta = 25 c ta = 85 c ta = ? 30 c r on = 18 k ? r off = 20 k ? f osc = 500 khz f osc = 100 khz h threshold voltage (v thovph ) l threshold voltage (v thovpl )
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 8 of 40 threshold voltage of on/off terminal vs. ambient temperature threshold current of on/off terminal vs. ambient temperature threshold voltage of on/off terminal v thon/off (v) threshold current of on/off terminal i thon/off ( a) input current of vf terminal vs. input voltage discharge current of timer vs. ambient temperature input current of vf terminal i vf ( a) discharge current of timer i timeoff ( a) vf terminal voltage v vf (v) charge current of timer vs. ambient temperature on and off duration of timer vs. ambient temperature (intermittent operation) charge current of timer i timeon ( a) on duration of timer t on (ms) ambient temperature ta ( c) ambient temperature ta ( c) ambient temperature ta ( c) ambient temperature ta ( c) ambient temperature ta ( c) 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 25.0 20.0 15.0 5.0 0 0 175 150 125 100 75 18 17 16 15 14 13 12 11 10 ? 10 ? 9 ? 8 ? 7 ? 6 ? 5 ? 4 ? 3 ? 2 ? 1 ? 200 ? 180 ? 160 ? 140 ? 120 ? 100 ? 80 ? 60 ? 40 ? 60 ? 40 ? 200 20406080100 ? 60 ? 40 ? 20 0 20 40 60 80 100 ? 60 ? 40 ? 200 20406080100 ? 60 ? 40 ? 20 0 20 40 60 80 100 ? 60 ? 40 ? 200 20406080100 1.4 1.3 1.2 1.1 1.0 012345678910 off duration of timer t off (s) ta = 25 c ta = 85 c ta = ? 30 c on off off on on off off on timer on circuit operation on timer off circuit operation off timer on timer off
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 9 of 40 vf threshold voltage for timer vs. ambient temperature vf threshold voltage for timer (v) threshold voltage of clm+ terminal vs. ambient temperature threshold voltage of clm+ terminal v thclm+ (mv) clm+ terminal current vs. clm+ terminal voltage clm+ terminal current i inclm+ ( a) clm+ terminal voltage v clm+ (v) threshold voltage of clm ? terminal vs. ambient temperature clm ? terminal current vs. clm ? terminal voltage threshold voltage of clm ? terminal v thclm ? (mv) clm ? terminal current i inclm ? ( a) clm ? terminal voltage v clm ? (v) output high voltage vs. output source current output high voltage v cc -v oh (v) output source current i oh (a) ambient temperature ta ( c) ambient temperature ta ( c) ambient temperature ta ( c) 4.0 3.0 3.5 2.5 2.0 ? 60 ? 40 0 ? 20 20 40 60 80 100 ? 60 ? 40 0 ? 20 20 40 60 80 100 ? 60 ? 40 0 ? 20 20 40 60 80 100 210 200 205 195 190 ? 210 ? 205 ? 200 ? 195 ? 190 400 300 200 100 0 0 0.1 0.3 0.5 0.7 0.2 0.4 0.6 0.8 0.9 1.0 ? 500 ? 400 ? 300 ? 200 ? 100 0 0 ? 0.2 ? 0.4 ? 0.6 ? 0.8 ? 1.0 2.6 2.4 2.2 2.0 1.8 1.6 1.2 1.4 1.0 0.8 0.6 1 m 10 m 100 m 1 10 ta = 25 c ta = 85 c ta = ? 30 c ta = 25 c ta = 85 c ta = ? 30 c v cc = 18 v ta = 25 c
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 10 of 40 output low voltage vs. output sink current detection voltage vs. ambient temperature output sink current i ol (a) input current of detection amp vs. ambient temperature detection amp voltage gain vs. frequency detection voltage v det (v) output low voltage v ol (v) frequency f (hz) on duty vs. f/b terminal input current on duty vs. f/b terminal input current on duty (%) on duty (%) f/b terminal input current i f/b (ma) f/b terminal input current i f/b (ma) input current of detection amp i indet ( a) detection amp voltage gain g det (db) ambient temperature ta ( c) ambient temperature ta ( c) 5.0 4.0 3.0 2.0 0 1.0 1 m 10 m 100 m 1 10 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 ? 60 ? 40 ? 20 0 20 40 60 80 100 2.56 2.52 2.46 2.50 2.44 2.42 2.54 2.48 2.40 ? 60 ? 40 ? 20 0 20 40 60 80 100 50.0 40.0 30.0 20.0 10.0 0 100 1 k 10 k 100 k 1 m 10 m 50 40 30 20 0 10 0 0.5 1.0 1.5 2.0 2.5 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 ta = 25 c ta = 85 c ta = ? 30 c ta = 25 c ta = 85 c ta = ? 30 c ta = 25 c v cc = 18 v v cc = 5 v (f osc = 100 khz) r on = 18 k ? r off = 20 k ? (f osc = 200 khz) r on = 18 k ? r off = 20 k ?
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 11 of 40 on duty vs. f/b terminal input current upper & lower limit voltage of osc vs. ambient temperature on duty vs. r off f/b terminal input current i f/b (ma) oscillating frequency vs. cf terminal capacity cf terminal capacity (pf) oscillating frequency vs. ambient temperature on duty (%) on duty (%) oscillating frequency f osc (khz) oscillating frequency f osc (khz) oscillating frequency f osc (khz) upper & lower limit voltage of osc v osch , v oscl (v) r off (k ? ) oscillating frequency vs. ambient temperature ambient temperature ta ( c) ambient temperature ta ( c) ambient temperature ta ( c) 120 110 100 90 80 ? 60 ? 40 ? 20 0 20 40 60 80 100 700 600 500 400 300 200 ? 60 ? 40 ? 20 0 20 40 60 80 100 5.4 5.2 4.8 4.4 4.0 2.2 2.0 1.8 1.6 ? 60 ? 40 ? 20 0 20 40 60 80 100 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 10000 1000 100 10 1 1 3 10 3 100 3 1000 3 10000 100 90 80 70 60 50 40 20 30 0 10 1 357 10 357 100 ta = 25 c ta = 85 c ta = ? 30 c (f osc = 500 khz) r on = 18 k ? r off = 20 k ? f osc = 500 khz f osc = 200 khz f osc = 100 khz r on = 18 k ? r off = 20 k ? f osc = 100 khz f osc = 200 khz f osc = 500 khz r on = 22 k ? r off = 12 k ? r on = 36 k ? r off = 6.2 k ? r on = 24 k ? r off = 20 k ? 51 k ? 36 k ? 24 k ? 22 k ? 18 k ? 15 k ? 10 k ? r on = 75 k ? r on = 24 k ? r off = 20 k ? c f = 47 pf r on = 24 k ? r off = 20 k ? c f = 330 pf
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 12 of 40 on duty vs. ambient temperature on duty vs. ambient temperature input voltage of terminal vs. expansion rate of period ambient temperature ta ( c) on duty vs. ambient temperature ambient temperature ta ( c) input voltage of terminal vs. expansion rate of period input voltage of terminal v vf (v) on duty (%) on duty (%) input voltage of terminal v vf (v) ovp terminal input current i ovp (a) on duty (%) expansion rate of period (times) ovp terminal input current vs. input voltage ambient temperature ta ( c) expansion rate of period (times) ovp terminal input voltage v ovp (v) 5.0 4.0 3.0 2.0 0 1.0 0 2 4 6 8 101214161820 0 2 4 6 8 101214161820 ? 60 ? 40 ? 20 0 20 40 60 80 100 ? 60 ? 40 ? 20 0 20 40 60 80 100 1 m 100 10 1 0.2 0.4 0.6 0.8 1.0 100 90 80 70 60 50 30 10 40 20 0 100 90 80 70 60 50 30 10 40 20 0 ? 60 ? 40 ? 20 0 20 40 60 80 100 5.0 4.0 3.0 2.0 1.0 0 100 90 80 70 60 50 40 20 30 0 10 r on = 36 k ? , r off = 6.2 k ? r on = 22 k ? , r off = 12 k ? r on = 24 k ? , r off = 20 k ? r on = 22 k ? , r off = 22 k ? r on = 18 k ? , r off = 24 k ? r on = 15 k ? , r off = 27 k ? r on = 36 k ? , r off = 6.2 k ? r on = 22 k ? , r off = 12 k ? r on = 24 k ? , r off = 20 k ? r on = 22 k ? , r off = 22 k ? r on = 18 k ? , r off = 24 k ? r on = 15 k ? , r off = 27 k ? r on = 36 k ? , r off = 6.2 k ? r on = 22 k ? , r off = 12 k ? r on = 24 k ? , r off = 20 k ? r on = 22 k ? , r off = 22 k ? r on = 18 k ? , r off = 24 k ? r on = 15 k ? , r off = 27 k ? (f osc = 100 khz) (f osc = 500 khz) (f osc = 100 khz) (1) (2) (4) (5) (6) (3) (1) (2) (4) (5) (6) (3) (f osc = 200 khz) (1) r on = 15 k ? , r off = 27 k ? (2) r on = 18 k ? , r off = 24 k ? (3) r on = 22 k ? , r off = 22 k ? (4) r on = 24 k ? , r off = 20 k ? (5) r on = 22 k ? , r off = 12 k ? (6) r on = 36 k ? , r off = 6.2 k ? (f osc = 500 khz) (1) r on = 15 k ? , r off = 27 k ? (2) r on = 18 k ? , r off = 24 k ? (3) r on = 22 k ? , r off = 22 k ? (4) r on = 24 k ? , r off = 20 k ? (5) r on = 22 k ? , r off = 12 k ? (6) r on = 36 k ? , r off = 6.2 k ? ta = 25 c ta = 85 c ta = ? 30 c
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 13 of 40 current from ovp terminal for ovp reset i thovpc ( a) supply voltage v cc (v) current from ovp terminal for ovp reset vs. supply voltage 800 0 400 600 700 200 100 300 500 0101525 40 35 520 30 ta = 25 c ta = 85 c ta = ? 30 c horizontal-axis: 20 ns/div vertical-axis: 50 ma/div horizontal-axis: 20 ns/div vertical-axis: 10 ma/div output through current waveform at rising edge of output pulse output through current waveform at falling edge of output pulse
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 14 of 40 application example (1) example application circuit diagram of feed forward regulator m51995ap 1 2 4 3 14 13 15 9 10 11 12 8 6 7 5 16 + + + + + + + (2) example application circuit diagram of fly-back regulator r on m51995ap 1 2 4 3 14 13 15 9 10 11 12 8 6 7 5 16 + + +
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 15 of 40 (3) feed forward types smps with multi-output a c c fin v out collector v cc on/off vf emitter clm ? gnd clm+ t-off cf t-on ct f/b ovp det m51995ap c f c t + + r on r off + + c vcc r2 r1 a a + + v out2 v out1 + ovp f/b on/off
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 16 of 40 function description type m51995ap and m51995afp are especially designed for off-line primary pwm control ic of switching mode power supply (smps) to get dc voltage from ac power supply. using this ic, smart smps can be realized with reasonable cost and compact size as the number of external electric parts can be reduced and also part s can be replaced by reasonable one. in the following circuit diagram, mos fet is used for output transistor, however bipolar transistor can be used with no problem. start-up circuit section the start-up current is such lo w current level as typical 90 a, as shown in figure 1, when the v cc voltage is increased from low level to start-up voltage v cc(start) . in this voltage range, only a few parts in this ic, which has the function to make the output voltage low level, is alive and i cc current is used to keep output low level. the large voltage difference between v cc(start) and v cc(stop) makes start-up easy, because it takes rather long duration from v cc(start) to v cc(stop) . circuit current i cc (ma) supply voltage v cc (v) i cco 14 ma i ccl 90 a v cc (stop) 9.9 v v cc (start) 16.2 v figure 1 circuit current vs. supply voltage
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 17 of 40 oscillator section the oscillation waveform is the triangle one. the on-duration of output pulse depends on the rising duration of the triangle waveform and dead-time is decided by the falling duration. the rising duration is determined by the product of external resistor r on and capacitor c f and the falling duration is mainly determined by the product of resistor r off and capacitor c f . waveform of cf terminal waveform of v out terminal in max on dutycondition v osch 4.4 v v oscl 2.0 v v oh v ol figure 2 osc waveform at normal condition (no-operation of intermittent action and osc control circuit) 1. oscillator operation when intermittent action and osc control circuit does not operate figure 3 shows the equivalent charging and discharging circuit diagram of oscillator when the current limiting circuit does not operate. it means that intermittent action and osc control circuit does not operate. the current flows through r on from the constant voltage source of 5.8 v. c f is charged up by the same amplitude as r on current, when internal switch sw1 is switched to ?charging side?. the rise rate of c f terminal is given as v t-on r on c f (v/s) (1) where v t-on 4.5 v the maximum on duration is approximately given as (s) (2) (v osch ? v oscl ) r on c f v t-on where v osch 4.4 v v oscl 2.0 v c f is discharged by the summed-up of r off current and one sixteenth (1/16) of r on current by the function of q2, q3 and q4 when sw1, sw2 are switched to ?discharge side?. so fall rate of cf terminal is given as + (v/s) (3) v t-off r off c f v t-on 16 r on c f the minimum off duration approximately is given as (s) (4) (v osch ? v oscl ) c f v t-off r off + v t-on 16 r on where v t ? off 3.5 v the cycle time of oscillation is given by the summation of equations 2 and 4. the frequency including the dead-time is not influenced by the temperature because of the bu ilt-in temperature compensating circuit.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 18 of 40 t-on from vf signal vz = 4.2 v t-off cf r on r off c f m51995a q3 q4 1/16 q2 sw2 sw1 charging discharging 5.8 v switched by charging and discharging signal q1 figure 3 schematic diagram of charging and discharging control circuit for osc capacitor c f 2. oscillator operation when intermittent action and osc control circuit operates. when over current signal is applied to clm + or clm ? terminal, and the current limiting circuit, intermittent action and osc control circuit starts to operate. in this case t-off terminal voltage depends on vf terminal voltage, so the oscillation frequency decreases and dead-time spreads. the rise rate of oscillation waveform is given as v t-on r on c f (v/s) (5) the fall rate of oscillation waveform is given as + (v/s) (6) v vf ? v vfo r off c f v t-on 16 r on c f where v t-on 4.5 v v vf ; v f terminal voltage v vfo 0.4 v v vf ? v fo = 0 if v vf ? v vfo < 0 v vf ? v vfo = v t-off if v vf ? v vfo > v t ? off 3.5 v so when v vf > 3.5 v, the operation is just same as that in the no current limiting operation state. the maximum on-duration is just same as that in the no-operation state of intermittent and oscillation control circuit and is given as follows; (s) (7) (v osch ? v oscl ) r off c f v t-on the minimum off-duration is approximately given as; + (s) (8) (v osch ? v oscl ) c f v vf ? v vfo r off c f v t-on 16 r on c f the oscillation period is given by the summation of equation (7) and (8).
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 19 of 40 as shown in figure 5, the internal circuit kills the first output pulse in the output waveform. the output waveform will appear from the second pulse cycle becau se the duration of first cycle takes c f charging time longer comparing with that at the stable operating state. usually the applied voltage to vf terminal must be proportional the output voltage of the regulator. so when the over current occurs and the output voltage of the regulator becomes low, the off-duration becomes wide. there are two methods to get the control voltage, which depends on the output voltage, on primary side. for the fly back type regulator application, the induced voltage on th e third or bias winding is dependent on output voltage. on the other hand, for the feed forward type regulator applica tion, it can be used that the output voltage depends on the product of induced voltage and ?on-duty?, as the current of choke coil will con tinue at over load condition, it means the ?continuous current? condition. figure 6 shows one of the examples for vf terminal application for the feed forward type regulator. voltage waveform of cf terminal voltage waveform of output terminal at max on duty v osch 4.4 v v oscl 2.0 v v oh v ol figure 4 osc waveform with operation of in termittent and osc control circuit operation start from 0 v first pulse operation start 0 0 v osch v oscl v oh v ol voltage waveform of cf terminal voltage waveform of output terminal at max on duty no generate pulse figure 5 relation between osc and output waveform circuit operation at start-up m51995a v out vf r vffb c vffb figure 6 feedback loop with low pass filter from output to vf terminal
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 20 of 40 pwm comparator and pwm latch section figure 7 shows the pwm comparator and latch section. the on-duration of output waveform coincides with the rising duration of cf terminal waveform, wh en the infinitive resistor is conn ected between f/b terminal and gnd. when the f/b terminal has finite impedance and current flows out from f/b terminal, ?a? point potential shown in figure 7 depends on this current. so th e ?a? point potential is close to gnd leve l when the flow-out current becomes large. ?a? point potential is compared with the cf terminal oscillator waveform and pwm comparator, and the latch circuit is set when the potential of oscillator waveform is higher than ?a? point potential. on the other hand, this latch circuit is reset by high level signal during the dead-time of oscillation (falling duration of oscillation waveform). so the ?b? point potential or output waveform of latch circuit is the one shown in figure 8. the final output waveform or ?c? point potential is got by combining the ?b? point signal and dead-time signal logically. (please refer to figure 8) + ? 7.1 v 5.8 v point a pwm comp. cf m51995a f/b 6 s 1 s latch point b to output point c from osc 500 ? 200 a 3 k 15.2 k figure 7 pwm comparator and latch circuit waveform of osc & point a point b point c osc waveform point a figure 8 waveforms of pwm comparator input point a, latch circuit points b and c
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 21 of 40 current limiting section when the current-limit signal is applied before the crossing instant of ?a? pint potential and cf terminal voltage shown in figure 7, this signal makes the output ?off? and the off state will continue until next cycle. figure 9 shows the timing relation among them. the current limiting circuit has two input term inals, one has the detector-sensitivity of + 200 mv to the gnd terminal and the other has ? 200 mv. the circuit will be latched if the input signal is over the limit of either terminal. if the current limiting circuit is set, no waveform is generated at output terminal however this state is reset during the succeeding dead-time. so this current limiting circuit is able to have the function in every cycle, and is named ?pulse-by-pulse current limit?. it is rather recommended to use not "clm + " but "clm ? " terminal, as the influence from the gate drive current of mos fet can be eliminated and wide voltage rating of + 4 v to ? 4 v is guaranteed for absolute maximum rating. there happen some noise voltage on r clm during the switching of power transistor due to the snubber circuit and stray capacitor of the transformer windings. to eliminate the abnormal operation by the noise vo ltage, the low pass filter, which consists of r nf and c nf is used as shown in figure 10. it is recommended to use 10 to 100 ? for r nf because such range of r nf is not influenced by the flow-out current of some 200 a from c lm terminal and c nf is designed to have the enough value to absorb the noise voltage. v thclm 200 mv v thclm ? 200 mv (a) +current limit (b) ? current limit osc waveform of cf terminal waveform of clm+ terminal current limit signal to set latch waveform of v out terminal osc waveform of cf terminal waveform of clm ? terminal current limit signal to set latch waveform of v out terminal figure 9 operating waveforms of current limiting circuit
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 22 of 40 + m51995a v out clm+ gnd c nf r nf r clm + m51995a v out clm ? gnd c nf r nf r clm (a) in case of clm+ (b) in case of clm ? figure 10 how to connect current limit circuit intermittent action and oscillation control section when the internal current limiting circuit states to operate and also the vf level decreases to lower than the certain level of some 3 v, the dead-time spreads and intermittent action and osc control circuit (which is one of the timer-type- protection circuit) starts to operate. the intermittent action and osc control circuit is the one to generate the control signal for oscillator and intermittent action circuit. figure 11 shows the timing-chart of this circuit. when the output of intermittent action and oscillation control is at ?high? level, the waveform of oscillator depends on the vf terminal voltage and the intermittent action circuit begins to operate. osc waveform of cf terminal current limit signal output of current limit latch output of intermittent action and osc control circuit (a) with current limit signal (b) without current limit signal osc waveform of cf terminal current limit signal output of current limit latch output of intermittent action and osc control circuit gnd gnd gnd figure 11 timing chart of intermittent and osc control circuit
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 23 of 40 intermittent action circuit section intermittent action circuit will start to operate when the output signal from the intermittent action and oscillation control circuit are ?high? and also vf terminal voltage is lower than v thtime of about 3 v. figure 12 shows the block diagram of intermittent action circuit. transistor q is on state when vf terminal voltage is higher than v thtime of about 3 v, so the ct terminal voltage is near to gnd potential. when vf terminal voltage is lower than v thtime , q becomes ?off? and the ct has the possibility to be charged up. under this condition, if the intermittent action and oscillation control signal become ?high? the switch swa will close only in this ?high? duration and c t is charged up by the current of 120 a through sw a (sw b is open) and ct terminal potential will rise. the output pulse can be generated only this duration. when th e ct terminal voltage reaches to 8 v, the control logic circuit makes the sw a ?off? and sw b ?on?, in order to flow in the i timeoff of 15 a to ct terminal. the ic operation will be ceased in the falling duration. on the other hand, when ct terminal voltage decreases to lower than 2 v, the ic operation will be reset to original state, as the control logic circuit makes the sw a ?on? and sw b ?off?. therefore the parts in power circuit including secondary rectifier diodes are protected from the overheat by the over current. i timeoff ( 15 a) i timeon ( 120 a) control logic a b sw a sw b c t ct q vf v thtime ( 3 v) + + ? figure 12 block diagram of intermittent action circuit no operating duration 8 v 2 v figure 13 waveform of ct terminal figure 14 shows the i cc versus v cc in this timer-off duration. in this duration the power is not supplied to ic from the third winding of transformer but through from the resistor r1 connected to v cc line. if the r1 shown in application exampl e is selected adequate value, v cc terminal voltage will be kept at not so high or low but adequate value, as the i cc versus v cc characteristics has such the one shown in figure 14. to ground the ct terminal is recommended, when the intermittent mode is not used. in this case the oscillated frequency will become low but the ic will neither stop the oscillation nor change to the intermittent action mode, when the current limit function becomes to operate and the vf terminal voltage becomes low.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 24 of 40 circuit current i cc (ma) supply voltage v cc (v) 2.0 1.5 1.0 0.5 0 0 5 10 15 20 25 30 figure 14 i cc vs. v cc in timer-off duration of intermittent action circuit voltage detector circuit (det) section the det terminal can be used to control the output voltage which is determined by the winding ratio of fly back transformer in fly-back system or in case of common ground circuit of primary and secondary in feed forward system. the circuit diagram is quite similar to that of shunt regulator type 431 as shown in figure 15. as well known from figure 15 and figure 16, the output of op amp has the current-sink ability, when the det terminal voltage is higher than 2.5 v but it becomes high impedance state when lower than 2.5 v det terminal and f/b terminal have inverting phase characteristics each other, so it is recommended to conn ect the resistor and capacitor in series between them for phase compensation. it is very important, one can not connect by resistor directly as there is the voltage difference between them and the capacitor has the dc stopper function. 7.1 v det 5.4 k 10.8 k 10.8 k 1.2 k f/b 6 s 3 k 500 ? 1 s 10 s figure 15 equivalent circuit diagram of voltage detector
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 25 of 40 7.1 v f/b det 2.5 v 500 ? 6 s 3 k 1 s + ? op amp figure 16 equivalent circuit diagram of voltage detector on-off circuit section figure 17 shows the circuit diagram of on-off circuit. the current flown into the on-off terminal makes the q4 ?on? and the switching operation stop. on the other hand, the switching operation will recover as no current flown into on/off terminal makes q4 ?off?. as the constant current source connected to q4 base terminal has such the hysteresis characteristics of 20 a at operation and 3 a at stopping. so the unstable operation is not appeared even if the on/off terminal voltage signal varies slowly. q4 q3 q2 q1 2 k i on/off operate stop at q4 on i: 3 a at stopping i: 20 a at operating figure 17 on/off circuit figure 18 shows how to connect the on/off terminal. the switching operation will stop by switch-off and operate by switch-on. transistor or photo transistor can be replaced by this switch, of c ourse. no resistor of 30 to 100 k ? is connected and on/off terminal is directly connected to gnd, when it is not necessary to use the on/off operation. figure 19 shows the i cc versus v cc characteristics in off state and v cc will be kept at not so high or low but at the adequate voltage, when r1 shown in application example is selected properly.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 26 of 40 v cc on/off 30 k to 100 k ? m51995a figure 18 connecting of on/off terminal circuit current i cc (ma) supply voltage v cc (v) 1.6 1.2 0.8 0.4 0 0 5 10 15 20 25 30 figure 19 i cc vs. v cc in off state ovp circuit (over voltage protection circuit) section ovp circuit is basically positive feedback circuit constructed by q2, q3 as shown in figure 20. q2, q3 turn on and the circuit operation of ic stops, when the input signal is applied to ovp terminal. (threshold voltage 750 mv) the current value of i2 is about 150 a when the ovp does not operates but it decreases to about 2 a when ovp operates. it is necessary to input the sufficient larger current (800 a to 8 ma) than i2 for triggering the ovp operation. the reason to decrease i2 is that it is necessary that i cc at the ovp rest supply voltage is small. it is necessary that ovp state holds by circuit current from r1 in the application example, so this ic has the characteristic of small i cc at the ovp reset supply voltage ( stand-by current + 20 a) on the other hand, the circuit current is large in the highe r supply voltage, so the supply voltage of this ic doesn?t become so high by the voltage drop across r1. this characteristic is shown in figure 21. the ovp terminal input current in the voltage lower than th e ovp threshold voltage is based on i2 and the input current in the voltage higher than the ovp threshold voltage is the su m of the current flowing to the base of q3 and the current flowing from the collector of q2 to the base. for holding in the latch state, it is necessary that the ovp terminal voltage is kept in the voltage higher than v be of q3. so if the capacitor is connected between the ovp terminal and gnd, even though q2 turns on in a moment by the surge voltage, etc. this latch action does not hold if the ovp terminal voltage does not become higher than v be of q3 by charging this capacitor. for resetting ovp state, it is necessary to make the ovp terminal voltage lower than the ovp l threshold voltage or make v cc lower than the ovp reset supply voltage.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 27 of 40 as the ovp reset voltage is settled on the rather high voltage of 9.0 v, smps can be reset in rather short time from the switch-off of the ac power source if the smoothing capacitor is not so large value. v cc ovp gnd 8 k 12 k q1 q2 2.5 k 400 i 2 7.8 v 100 a i 1 q3 note: i 1 = 0 when ovp operates figure 20 detail diagram of ovp circuit circuit current i cc (ma) supply voltage v cc (v) 8 7 6 5 4 2 0 3 1 0 5 10 15 25 35 20 30 40 ovp reset point 8.82 v ( ? 30 c) 8.97 v (25 c) 9.07 v (85 c) ta = 25 c ta = 85 c ta = ? 30 c figure 21 circuit current vs. supply voltage (ovp operation) output section it is required that the output circuit has the high sink and source abilities for mos fet drive. it is well known that the totempole circuit has high sink and source ability. however, it has the demerit of high through current. for example, the through current may reach such the high current level of 1 a, if type m51995a has the ?conventional? totempole circuit. for the high frequency application such as higher than 100 khz, this through current is very important factor and will cause not only the large i cc current and the inevitable heat-up of ic but also the noise voltage. this ic uses the improved totempole circuit, so without deteriorating the characteristic of operating speed, its through current is approximately 100 ma.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 28 of 40 application note of type m51995ap/afp design of start-up circuit and the power supply of ic 1. the start-up circuit when it is not necessary to set the start and stop input voltage + m51995a v cc gnd c vcc r1 v f main transformer third winding o r bias winding rectified dc voltage from smoothing capacitor figure 22 start-up circuit diagram (when it is not necessary to set the start and stop input voltage) figure 22 shows one of the example circuit diagram of the st art?up circuit which is used when it is not necessary to set the start and stop voltage. it is recommended that the current more than 300 a flows through r1 in order to overcome the operation start-up current i cc(start) and c vcc is in the range of 10 to 47 f. the product of r1 by c vcc causes the time delay of operation, so the response time will be long if the product is too much large. just after the start-up, the i cc current is supplied from c vcc , however, under the steady state condition, ic will be supplied from the third winding or bias winding of transformer, the winding ratio of the third winding must be designed so that the induced voltage may be higher than the operation-stop voltage v cc(stop) . the v cc voltage is recommended to be 12 v to 17 v as the normal and optimum gate voltage is 10 to 15 v and the output voltage (v oh ) of type m51995ap/afp is about (v cc ? 2 v). it is not necessary that the induced voltage is settled higher than the operation start-up voltage v cc(start) , and the high gate drive voltage causes high gate dissipation, on the other hand, too low gate drive voltage does not make the mos fet fully on-state or the saturation state. 2. the start-up circuit when it is not necessary to set the start and stop input voltage it is recommend to use the third winding of ?forward winding? or ?positive polarity? as shown in figure 23, when the dc source voltages at both the ic operation start and stop must be settled at the specified values. the input voltage (v in(start) ), at which the ic operation starts, is decided by r1 and r2 utilizing the low start-up current characteristics of type m51995ap/afp. the input voltage (v in(stop) ), at which the ic operation stops, is decided by the ratio of third winding of transformer. the v in(start) and v in(stop) are given by following equations. v in (start) r1 i ccl + ( + 1) v cc (start) (9) r1 r2 v in (stop) (v cc (stop) ? v f ) + v' in rip (p-p) (10) n p n b 2 1 where i ccl is the operation start-up current of ic v cc(start) is the operation start-up voltage of ic v cc(stop) is the operation stop voltage of ic v f is the forward voltage of rectifier diode v ?in(p-p) is the peak to peak ripple voltage of v cc terminal v' in rip (p-p) n b n p it is required that the v in(start) must be higher than v in(stop) .
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 29 of 40 when the third winding is the ?fly back winding? or ?reverse polarity?, the v in(start) can be fixed, however, v in(stop) can not be settled by this system, so the auxiliary circuit is required. + m51995a primary winding of transformer third winding of transformer rectified dc voltage from smoothing capacitor v in r1 r2 c vcc gnd v cc v f n p n b figure 23 start-up circuit diagram (when it is not necessary to set the start and stop input voltage) 3. notice to the v cc , v cc line and gnd line + m51995a collector output emitter gnd c vcc v cc main transformer third winding r clm figure 24 how to design the conductor-pattern of type m51995a on pc board (schematic example) to avoid the abnormal ic operation, it is recommended to design the v cc is not vary abruptly and has few spike voltage, which is induced from the stray capacity between the winding of main transformer. to reduce the spike voltage, the c vcc , which is connected between v cc and ground, must have the good high frequency characteristics. to design the conductor-pattern on pc board, following cau tions must be considered as shown in figure 24. (1) to separate the emitter line of ty pe m51995a from the gnd line of the ic (2) the locate the c vcc as near as possible to type m51995a and connect directly (3) to separate the collector line of type m51995a from the v cc line of the ic (4) to connect the ground terminals of peripheral parts of ic s to gnd of type m51995a as short as possible
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 30 of 40 4. power supply circuit for easy start-up when ic starts to operate, the voltage of the c vcc begins to decrease till the c vcc becomes to be charged from the third winding of main-transformer as the i cc of the ic increases abruptly. in case shown in figure 22 and 23, some ?unstable start-up? or ?fall to start-up? may happen, as the charging interval of c vcc is very short duration; that is the charging does occur only the duration while the induced winding voltage is higher than the c vcc voltage, if the induced winding voltage is nearly equal to the ?operation-stop voltage? of type m51995. it is recommended to use the 10 to 47 f for c vcc1, and about 5 times capacity bigger than c vcc1 for c vcc2 in figure 25. + + v cc gnd c vcc1 c vcc2 r1 main transformer third winding m51995a figure 25 dc source circuit for stable start-up ovp circuit (1) to avoid the miss operation of ovp it is recommended to connect the capacitor between ovp terminal and gnd for avoidi ng the miss operation by the spike noise. the ovp terminal is connected with the sink current source ( 150 a) in ic when ovp does not operate, for absorbing the leak current of the photo coupler in the application. so the resistance between the ovp terminal and gnd for leak-cut is not necessary. if the resistance is connected, the supply current at the ovp reset supply voltage becomes large. as the result, the ovp reset supply voltage ma y become higher than the operation stop voltage. in that case, the ovp action is reset when the ovp is tr iggered at the supply voltage a little high than the operation stop voltage. so it should be avoided absolutely to connect the resistance between the ovp terminal and gnd. + v cc ovp gnd photo couple r 10 k m51995a figure 26 peripheral circuit of ovp terminal
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 31 of 40 2. application circuit to make the ovp-reset time fast the reset time may becomes problem when the discharge time constant of c fin ? (r1 + r2) is long. under such the circuit condition, it is recommended to discharge the c vcc forcedly and to make the v cc low value. this makes the ovp-reset time fast. + + to main transformer r1 v cc gnd c vcc r2 c fin the time constant of this part should be short m51995a figure 27 example circuit diagra m to make the ovp-reset-time fast 3. ovp setting method using the induced third winding voltage on fly back system for the over voltage protection (ovp), the induced fly back type third winding voltage can be utilized, as the induced third winding voltage depends on the output voltage. figure 28 shows one of the example circuit diagram. + main transformer third winding v cc ovp gnd c vcc 470 ? m51995a figure 28 ovp setting method using the indu ced third winding voltage on fly back system
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 32 of 40 current limiting circuit 1. peripheral circuit of clm + , clm ? terminal + + r1 v cc collector c vcc v out clm+ emitter gnd m51995a r nf1 r nf2 c nf r clm c fin input smoothing capacitor figure 29 peripheral circuit diagram of clm + terminal + + r1 v cc collector c vcc v out clm ? emitter gnd m51995a r nf1 r nf2 c nf r clm c fin input smoothing capacitor figure 30 peripheral circuit diagram of clm ? terminal figure 29 and 30 show the example circuit diagrams around the clm + and clm ? terminal. it is required to connect the low pass filter, as the main current or drain current contains the spike current especially during the turn- on duration of mos fet. 1,000 pf to 22,000 pf is recommended for c nf and the r nf1 and r nf2 have the functions both to adjust the ?current- detecting-sensitivity? and to consist the low pass filter. to design the r nf1 and r nf2 , it is required to consider the influence of clm terminal source current (i inclm + or i nfclm ? ), which value is in the range of 90 to 270 a. in order to be not influenced from these resistor paralleled value of r nf1 and r nf2 , (r nf1 /r nf2 ) is recommended to be less than 100 ? . the r clm should be the non-inductive resistor.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 33 of 40 2. over current limiting curve (1) in case of feed forward system (a) feed forward system (b) primary and secondary current i 1 i 2 i p1 i p2 i 1 clm r clm i 2 figure 31 primary and secondary current wa veforms under the current limiting operation condition on feed forward system figure 31 shows the primary and secondary current wave-forms under the current limiting operation. at the typical application of pulse-by-pulse primary curre nt detecting circuit, the secondary current depends on the primary current. as the peak value of secondary current is limited to specified value, the characteristics curve of output voltage versus output current become to the one as shown in figure 32. the demerit of the pulse by pulse current limiting system is that the output pulse width can not reduce to less than some value because of the de lay time of low pass filter connected to the clm terminal and propagation delay time t pdclm from clm terminal to output terminal of type m51995a. the typical t pdclm is 100 ns. as the frequency becomes higher, the delay time must be shorter. and as the secondary output voltage becomes higher, the dynamic range of on-duty must be wider; it means that it is required to make the on-duration much more narrower. so this system has the demerit at the higher oscillating frequency and higher output voltage applications. output current output voltage figure 32 over current limiting curve on feed forward system to improve these points, the oscillating frequency is set low using the characteristics of vf terminal. when the current limiting circuit operates under the over current condition, the oscillating frequency decreases in accordance with the d ecrease of vf terminal voltage, if the vf is lower than 3.5v.and also the dead time becomes longer. under the condition of current limiting operation, the output current i2 continues as shown in figure 31. so the output voltage depends on the product of the input primary voltage v in and the on-duty. if the third winding polarity is positive, the v cc depends on v in , so it is concluded that the smoothed voltage of v out terminal depends on the output dc voltage of the smps. so the sharp current limiting characteristics will be got, if the v out voltage if feed back to vf terminal through low pass filter as shown in figure 33. it is recommended to use 15 k ? for r vffb , and 10,000 pf for c vffb in figure 33.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 34 of 40 m51995a v out vf r vffb c vffb figure 33 feed back loop through low pass filter from v out to v f terminal figure 34 shows how to control the knee point where the frequency becomes decrease, from v out to vf from v out to vf from v out to vf to make the knee point high to make the knee point low figure 34 how to control the knee point (2) in case of fly back system the dc output voltage of smps depends on the v cc voltage of type m51995a when the polarity of the third winding is negative and the system is fly back. so the operation of type m51995a will stop when the v cc becomes lower than ?operation-stop voltage? of m51995a when the dc output voltage of smps decreases under specified value at over load condition. dc output voltage dc output current point that v cc voltage or third winding voltage decreases under "operation-stop voltage" figure 35 over current limiting curve on fly back system m51995a v cc collector vf r1 r2 c vcc + figure 36 circuit diagram to make knee point low on fly back system
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 35 of 40 however, the m51995a will non-operate a nd operate intermittently, as the v cc voltage rises in accordance with the decrease of i cc current. the fly back system has the constant output power char acteristics as shown in figur e 35 when the peak primary current and the operating frequency are constant. to control the increase of dc output current, the opera ting frequency is decreased using the characteristics of vf terminal when the over current limiting function begins to operate. the voltage which mode by dividing the v cc is applied to vf terminal as shown in figure 36, as the induced third winding voltage depends on the dc output voltage of smps. 15 k ? or less is recommended for r 2 in figure 36, it is noticed that the current flows through r 1 and r 2 will superpose on the i cc(start) current. if the r 1 is connected to c vcc2 in figure 25, the current flows through r 1 and r 2 is independent of the i cc(start) . (3) application circuit to keep th e non-operating condition when over load current condition will continue for specified duration the ct terminal voltage will begin to rise and the capacito r connected to ct terminal will be charged-up, if the current limiting function starts, and vf terminal voltage decreases below v thtime ( 3 v). if the charged-up ct terminal voltage is applied to ovp terminal through the level-shifter consisted of buffer transistor and resistor, it makes ty pe m51995a keep non- operating condition. v cc c t ct ovp m51995a + figure 37 application circuit diagram to keep th e non-operating condition when over load current condition will continue for specified duration output circuit 1. the output terminal characteristics at the v cc voltage lower than the ?operation-stop? voltage the output terminal has the curre nt sink ability even though the v cc voltage lower than the ?operation-stop? voltage or v cc(stop) (it means that the terminal is ?output low st ate? and please refer char acteristics of output low voltage versus sink current.) this characteristics has the merit not to damage the mos fet at the stop of operation when the v cc voltage decreases lower than the voltage of v cc (stop) , as the gate charge of mos fet, which shows the capacitive load characteristics to the output terminal, is drawn out rapidly. the output terminal has the draw-out ability above the v cc voltage of 2 v, however, lower than the 2 v, it loses the ability and the output terminal potential may rise due to the leakage current. in this case, it is recommended to connect the resistor of 100 k ? between gate and source of mos fet as shown in figure 38. m51995a v out to main transformer r clm 100 k ? figure 38 circuit diagram to prevent the mos fet gate potential rising
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 36 of 40 2. mos fet gate drive power dissipation figure 39 shows the relation between the applied gate voltage and the stored gate charge. in the region 1, the charge is mainly stored at c gs as the depletion is spread and c gd is small owing to the off-state of mos fet and the high drain voltage. in the region 2, the c gd is multiplied by the ?mirror effect? as the characteristics of mos fet transfers from off- state to on-state. in the region 3, both the c gd and c gs affect to the characteris tics as the mos fet is on-state and the drain voltage is low. gate-source voltage v gs (v) total stored gate charge (nc) 20 15 10 5 0 0481216 20 drain i d v d c ds c gs source v gs gate c gd v ds = 80 v 200 v 320 v i d = 4 a (1) (2) (3) figure 39 the relation between applied gate-source voltage and stored gate charge the charging and discharging current caused by this gate charge makes the gate power dissipation. the relation between gate drive current i d and total gate charge q gsh is shown by following equation; i d = q gsh ? f osc (11) where f osc is switching frequency as the gate drive current may reach up to several tenths milliamperes at 500 khz operation, depending on the size of mos fet, the power dissipation caused by the gate current can not be neglected. in this case, following action will be cons idered to avoid heat up of type m51995a. (1) to attach the heat sink to type m51995a (2) to use the printed circuit board with the good thermal conductivity (3) to use the buffer circuit shown next section 3. output buffer circuit it is recommended to use the output buffer circuit as shown in figure 40, when type m51995a drives the large capacitive load or bipolar transistor. v out m51995a figure 40 output buffer circuit diagram
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 37 of 40 det circuit figure 41 shows how to use the det circuit for the voltage detector and error amplifier. c4 c2 r3 c1 c f/b det r1 detecting voltage b a r2 m51995a figure 41 how to use the det circuit for the voltage detector for the phase shift compensation, it is recommended to connected the cr network between det terminal and f/b terminal. figure 42 shows the gain-frequency characteristics be tween point b and point c shown in figure 41. log g (db) log 1 2 g1 g avdet (dc voltage gain) figure 42 gain-frequency characteristics between point b and c shown in figure 41 the g1, 1 and 2 are given by following equations; g1 = (12) r3 r1 / r2 1 c2 ? r3 1 = (13) c1 + c2 c1 ? c2 ? r3 2 = (14) at the start of the operation, there happen to be no output pul se due to f/b terminal current through c1 and c2, as the potential of f/b terminal rises sharply just after the start of the operation. not to lack the output pulse, is recommended to connect the capacitor c4 as shown by broken line. please take notice that the current flows through the r1 and r2 are superposed to i cc(start) . not to superpose, r1 is connected to c vcc2 as shown in figure 25.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 38 of 40 how to get the narrow pulse width during the start of operation figure 43 shows how to get the narrow pulse width during the start of the operation. if the pulse train of forcedly narrowed pulse-width continues too long, the misstart of operation may happen, so it is recommended to make the output pulse width narrow only for a few pulse at the start of operation. 0.1 f is recommended for the c. m51995a f/b to photo coupler 100 ? c figure 43 how to get the narrow pulse width during the start of operation how to synchronize with external circuit type m51995a has no function to synchronize with external circuit, however, there is some application circuit for synchronization as shown in figure 44. if this circuit is us ed, the synchronization may be out of order at the overload condition when the current limiting function starts to operate and vf terminal voltage becomes lower than 3 v. m51995a t-on cf t-off ct c t r off c f r on q1 q2 + 120 a synchronous pulse 0 v 0 v maximum pulse width of synchronous pulse minimum pulse width of synchronous pulse synchronize waveform oscillating waveform figure 44 how to synchronize with external circuit
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 39 of 40 driver circuit for bipolar transistor when the bipolar transistor is used instead of mos fet, the base current of bipolar transistor must be sinked by the negative base voltage source for the switching-off duration, in order to make the switching speed of bipolar transistor fast one. in this case, over current can not be detected by detecting resi stor in series to bipolar transistor, so it is recommended to use the ct (current transformer). v cc ? v ss ( ? 2 v to ? 5 v) v out m51995a emitter gnd v cc collector figure 45 driver circuit diagram (1) for bipolar transistor for the low current rating transistor, type m51995a can drive it directly as shown in figure 46. v out gnd v cc m51995a emitter collector bipolar transisto r figure 46 driver circuit diagram (2) for bipolar transistor attention for heat generation the maximum ambient temperature of type m51995a is + 85 c, however, the ambient temperat ure in vicinity of the ic is not uniform and varies pl ace by place, as the amount of power dissipation is fearfully large and the power dissipation is generated locally in the switching regulator. so it is one of the good idea to check the ic package temperature. the temperature difference between ic junc tion and the surface of ic package is 15 c or less, when the ic junction temperature is measured by temperature dependency of forward voltage of pin junction, and ic package temperature is measured by ?thermo-viewer?, and also the ic is mounted on the ?phenol-base? pc board in normal atmosphere. so it is concluded that the maximum case temper ature (surface temperature of ic) rating is 120 c with adequate margin. as type m51995 has the modified totempole driver circuit, the transient through current is very small and the total power dissipation is decreased to the reasonable power level.
m51995ap/afp rej03d0835-0300 rev.3.00 jun 06, 2008 page 40 of 40 package dimensions 2. 1. dimensions "*1" and "*2" do not include mold flash. note) dimension "*3" does not include trim offset. 1.42 1.12 b p a 1 h e y 0.1 e 1.27 c 0 8 l 0.4 0.6 0.8 0 0.1 0.2 a 2.1 7.5 7.8 8.1 a 2 1.8 e 5.2 5.3 5.4 d 12.5 12.6 12.7 reference symbol dimension in millimeters min nom max 0.35 0.4 0.5 0.18 0.2 0.25 p-sop20-5.3x12.6-1.27 0.3g mass[typ.] 20p2n-a prsp0020da-a renesas code jeita package code previous code detail f l a 2 a 1 y index mark *1 *2 *3 1 10 11 20 f h e e e b p a c d include trim offset. dimension "*3" does not note) do not include mold flash. dimensions "*1" and "*2" 1. 2. *3 *3 *2 *1 16 9 8 1 seating plane e 1 c e a 1 a 2 l a d e b 2 b p b 3 2.79 2.29 4.5 a 1 b 3 15 e2.54 c l3.0 0.51 1.4 1.5 1.8 a e6.156.36.45 d 18.8 19.0 19.2 reference symbol dimension in millimeters min nom max 0.22 0.27 0.34 p-dip16-6.3x19-2.54 1.0g mass[typ.] 16p4 prdp0016aa-a renesas code jeita package code previous code b p 0.4 0.5 0.6 e 1 7.62 7.32 7.92 b 2 0.9 1.0 1.3 a 2 3.3 0
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